User and Reference Guide for the Intel® C++ Compiler 14.0

New Options

This topic lists the options that provide new functionality in this release.

Some compiler options are only available on certain systems, as indicated by these labels:

Label

Meaning

i32

The option is available on systems using IA-32 architecture.

i64em

The option is available on systems using Intel® 64 architecture and Intel® Many Integrated Core Architecture (Intel® MIC Architecture).

If no label appears, the option is available on all supported systems.

If "only" appears in the label, the option is only available on the identified system.

For more details on the options, refer to the individual option descriptions.

For information on conventions used in this table, see Notational Conventions.

New compiler options are listed in tables below:

Windows* OS Options

Description

Default

/QaxMIC-AVX512

May generate Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Foundation instructions, Intel® AVX-512 Conflict Detection instructions, Intel® AVX-512 Exponential and Reciprocal instructions, Intel® AVX-512 Prefetch instructions for Intel® processors, and the instructions enabled with CORE-AVX2.

OFF

/Qcheck-pointers-mpx

Determines whether the compiler checks bounds for memory access through pointers on processors that support Intel® Memory Protection Extensions (Intel® MPX).

/Qcheck-pointers-mpx:none

/Qimf-domain-exclusion

Indicates the input arguments domain on which math functions must provide correct results.

Zero ("0")

/Qipp-link

Controls whether the compiler links to static, dynamic threaded, or static threaded Intel® Integrated Performance Primitives (Intel® IPP) run-time libraries.

/Qipp-link:dynamic

/Qmic

Builds an application that runs natively on Intel® MIC Architecture. This option only applies to Intel® MIC Architecture.

OFF

/Qoffload[=keyword]

Causes the compiler to ignore language constructs for offloading. This option only applies to Intel® MIC Architecture. Option /Qoffload- is also available for Intel® Graphics Technology.

OFF

/Qoffload-attribute-target=target-name

Causes the compiler to flag every global routine and global data object in the source file with the offload attribute "target(mic)" or "target(gfx)". This option only applies to Intel® MIC Architecture and Intel® Graphics Technology.

OFF

/Qoffload-option, target, tool, "option-list"

Lets you explicitly specify options to be used for the specified target and tool. This option only applies to Intel® MIC Architecture and Intel® Graphics Technology.

OFF

/Qopenmp-offload (i64em)

Enables or disables OpenMP* offloading compilation for the target pragmas. This option only applies to Intel® MIC Architecture.

OFF

/Qopenmp-simd (i64em)

Enables or disables OpenMP* SIMD compilation.

OFF

/Qopt-assume-safe-padding (i64em)

Determines whether the compiler assumes that variables and dynamically allocated memory are padded past the end of the object. This option only applies to Intel® MIC Architecture.

OFF

/Qopt-gather-scatter-unroll:n (i64em)

Lets you specify an alternative loop unroll sequence for gather and scatter loops on Intel® MIC Architecture. This option only applies to Intel® MIC Architecture.

/Qopt-gather-scatter-unroll-

/Qopt-prefetch-distance:n1[, n2] (i64em)

Specifies the prefetch distance to be used for compiler-generated prefetches inside loops. This option only applies to Intel® MIC Architecture.

OFF

/Qopt-streaming-cache-evict[:n] (i64em)

Specifies the cache eviction level to be used by the compiler for streaming loads and stores. This option only applies to Intel® MIC Architecture.

/Qopt-streaming-cache-evict:2

/Qopt-threads-per-core:n (i64em)

Informs the compiler about the number of hardware threads per core that will be used for an application. This option only applies to Intel® MIC Architecture.

/Qopt-threads-per-core:4

/Qvecabi:keyword

Determines whether the compiler uses the compatibility or legacy vector function application binary interface (ABI).

/Qvecabi:compat

/QxATOM_SSE4.2

May generate MOVBE instructions for Intel® processors, depending on the setting of option /Qinstruction. May also generate Intel® SSE4.2, SSE3, SSE2, and SSE instructions for Intel processors. Optimizes for Intel® Atom™ processors that support Intel® SSE4.2 and MOVBE instructions.

OFF

/QxMIC-AVX512

May generate Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Foundation instructions, Intel® AVX-512 Conflict Detection instructions, Intel® AVX-512 Exponential and Reciprocal instructions, Intel® AVX-512 Prefetch instructions for Intel® processors, and the instructions enabled with CORE-AVX2. Optimizes for Intel® processors that support Intel® AVX-512 instructions.

OFF

/Wpch-messages

Determines whether the compiler shows precompiled header (PCH) informational messages.

/Wpch-messages

Linux* OS and OS X* Options

Description

Default

-axMIC-AVX512

May generate Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Foundation instructions, Intel® AVX-512 Conflict Detection instructions, Intel® AVX-512 Exponential and Reciprocal instructions, Intel® AVX-512 Prefetch instructions for Intel® processors, and the instructions enabled with CORE-AVX2.

OFF

-check-pointers-mpx (Linux* OS only)

Determines whether the compiler checks bounds for memory access through pointers on processors that support Intel® Memory Protection Extensions (Intel® MPX).

-check-pointers-mpx:none

-fdefer-pop

Determines whether the compiler always pops the arguments to each function call as soon as that function returns.

-fdefer-pop

-f[no-]emit-class-debug-always (Linux* OS only)

Controls the format and size of debug information generated by the compiler for C++ classes.

-femit-class-debug-always

-fimf-domain-exclusion

Indicates the input arguments domain on which math functions must provide correct results.

Zero ("0")

-fmerge-constants (Linux* OS only)

Determines whether the compiler and linker attempt to merge identical constants (string constants and floating-point constants) across compilation units.

-fmerge-constants

-f[no-]mpc-privatize (i64em; Linux* OS only)

Enables or disables privatization of all static data for the MultiProcessor Computing environment (MPC) unified parallel runtime.

-fno-mpc-privatize

-foptimize-sibling-calls

Determines whether the compiler optimizes tail recursive calls.

-foptimize-sibling-calls

-gnu-prefix (Linux* OS only)

Lets you specify a prefix that will be added to the names of gnu utilities called from the compiler.

OFF

-ipp-link

Controls whether the compiler links to static, dynamic threaded, or static threaded Intel® Integrated Performance Primitives (Intel® IPP) run-time libraries.

-ipp-link=dynamic

-mlong-double (Linux* OS only)

Lets you override the default configuration of the long double data type.

-mlong-double-80

-openmp-offload (i64em; Linux* OS only)

Enables or disables OpenMP* offloading compilation for the target pragmas. This option only applies to Intel® MIC Architecture.

OFF

-openmp-simd (i64em; Linux* OS only)

Enables or disables OpenMP* SIMD compilation.

OFF

-opt-assume-safe-padding (i64em; Linux* OS only)

Determines whether the compiler assumes that variables and dynamically allocated memory are padded past the end of the object. This option only applies to Intel® MIC Architecture.

OFF

-opt-gather-scatter-unroll=n (i64em; Linux* OS only)

Lets you specify an alternative loop unroll sequence for gather and scatter loops on Intel® MIC Architecture. This option only applies to Intel® MIC Architecture.

-no-opt-gather-scatter-unroll

-opt-prefetch-distance=n1 [, n2] (i64em; Linux* OS only)

Specifies the prefetch distance to be used for compiler-generated prefetches inside loops. This option only applies to Intel® MIC Architecture.

OFF

-opt-streaming-cache-evict[=n] (i64em; Linux* OS only)

Specifies the cache eviction level to be used by the compiler for streaming loads and stores. This option only applies to Intel® MIC Architecture.

-opt-streaming-cache-evict=2

-opt-threads-per-core=n (i64em; Linux* OS only)

Informs the compiler about the number of hardware threads per core that will be used for an application. This option only applies to Intel® MIC Architecture.

-opt-threads-per-core=4

-static-libstdc++ (Linux* OS only)

Links the GNU libstdc++ library statically.

OFF

-stdlib=keyword (OS X* only)

Lets you select the C++ library to be used for linking.

-stdlib=libstdc++

-vecabi=keyword

Determines whether the compiler uses the compatibility or legacy vector function application binary interface (ABI).

-vecabi=compat

-Wpch-messages

Determines whether the compiler shows precompiled header (PCH) informational messages.

-Wpch-messages

-W[no-]ic-pointer

Determines whether warnings are issued for conversions between pointers to distinct scalar types with the same representation.

-Wic-pointer

-xATOM_SSE4.2

May generate MOVBE instructions for Intel® processors, depending on the setting of option -minstruction. May also generate Intel® SSE4.2, SSE3, SSE2, and SSE instructions for Intel processors. Optimizes for Intel® Atom™ processors that support Intel® SSE4.2 and MOVBE instructions.

OFF

-xMIC-AVX512

May generate Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Foundation instructions, Intel® AVX-512 Conflict Detection instructions, Intel® AVX-512 Exponential and Reciprocal instructions, Intel® AVX-512 Prefetch instructions for Intel® processors, and the instructions enabled with CORE-AVX2. Optimizes for Intel® processors that support Intel® AVX-512 instructions.

OFF


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