User and Reference Guide for the Intel® C++ Compiler 14.0
The Intel-specific C++ compiler pragmas described in the Intel-Specific Pragma reference are listed below.
Some pragmas are available for both Intel® and non-Intel microprocessors but they may perform additional optimizations for Intel® microprocessors than they perform for non-Intel microprocessors.
Click on the pragmas for a more detailed description.
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Pragma |
Description |
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Allocates one or more variables in the specified section. Controls section attribute specification for variables. |
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Specifies the grain size for one cilk_for loop. |
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Instructs the compiler to prefer loop distribution at the location indicated. |
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Specifies inlining of all calls in a statement. This also describes pragmas forceinline and noinline. |
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Controls the number of times inlining may be applied to a routine. |
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Controls the size that an individual routine can grow through inlining. |
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For Intel legacy tasking, specifies a unit of work, potentially executed by a different thread. |
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For Intel legacy tasking, specifies an environment for the while loop in which to queue the units of work specified by the enclosed task pragma. |
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Instructs the compiler to ignore assumed vector dependencies. |
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Specifies the iterations for the for loop. |
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Prevents a loop from fusing with adjacent loops. |
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Specifies that a particular loop should never be vectorized. |
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Executes the statements on the target. This pragma only applies to Intel® MIC Architecture and Intel® Graphics Technology. Intel® Graphics Technology is a preview feature. |
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Specifies that all functions and variables declared subsequent to the pragma are available on the target. This pragma only applies to Intel® MIC Architecture and Intel® Graphics Technology. |
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Initiates and completes a synchronous data transfer. If used with the signal clause, initiates an asynchronous data transfer. This pragma only applies to Intel® MIC Architecture. |
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Specifies a wait for a previously initiated asynchronous data transfer. This pragma only applies to Intel® MIC Architecture. |
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Specifies a computation that must be executed atomically. |
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Specifies a point in the code where each thread must wait until all threads in the team arrive. |
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Specifies a code block that is restricted to access by only one thread at a time. |
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Creates a version of a function that can process multiple arguments using Single Instruction Multiple Data (SIMD) instructions from a single invocation from a SIMD loop. |
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Creates a device-specific version of a function that can be called from a target region. This pragma only applies to Intel® MIC Architecture. |
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Specifies that the iterations of one of more loops should be shared among the master threads of all thread teams in a league. |
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Identifies a point at which the view of the memory by the thread becomes consistent with the memory. |
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Specifies a parallel loop. Each iteration of the loop is executed by one of the threads in the team. |
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Specifies the beginning of a loop that can be executed concurrently using Single Instruction Multiple Data (SIMD) instructions. Each iteration of the loop is executed by one of the threads in the team. |
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Specifies a parallel region that contains a loop to execute with Single Instruction Multiple Data (SIMD) instructions. |
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Specifies the beginning of a code block that must be executed only once by the master thread of the team. |
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Specifies a code block in a worksharing loop that will be run in the order of the loop iterations. |
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Specifies that a structured block should be run in parallel by a team of threads. |
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Specifies a parallel construct containing one or more associated loops. |
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Specifies a parallel construct that contains a single sections construct. |
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Defines a region of structured blocks that will be distributed among the threads in a team. |
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Transforms the loop into a loop that will be executed concurrently using Single Instruction Multiple Data (SIMD) instructions. |
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Specifies a structured block that will be executed only once by a single thread in the team. |
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Creates a device data environment and then executes the construct on that device. |
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Creates a device data environment by making a mapping of variables from the host to the target device. |
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Makes the items listed in the device data environment consistent between the device and host, in accordance with the motion clauses on the pragma. |
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Specifies the beginning of a code block whose execution may be deferred. |
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Causes the program to wait until the completion of all enclosed and descendant tasks. |
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Specifies that the current task can be suspended at this point, in favor of execution of a different task. |
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Specifies a wait on the completion of child tasks generated since the beginning of the current task. |
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Creates a league of thread teams to execute the structured block in the master thread of each team. |
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Specifies a list of globally-visible variables that will be allocated private to each thread. |
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Enables or disables optimizations for code after this pragma until another optimize pragma or end of the translation unit. |
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Controls optimization for one function or all functions after its first occurrence. |
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Tells the compiler to generate code specialized for a particular processor, at the function level, similar to the -m (/arch) options. |
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Resolves dependencies to facilitate auto-parallelization of the immediately following loop (parallel) or prevents auto-parallelization of the immediately following loop (noparallel). |
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Invites the compiler to issue or disable requests to prefetch data from memory. This pragma only applies to Intel® MIC Architecture. |
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Enforces vectorization of loops. |
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Indicates to the compiler to unroll or not to unroll a counted loop. |
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Enables or disables loop unrolling and jamming. These pragmas can only be applied to iterative for loops. |
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Describes variables that are unused (warnings not generated). |
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Indicates to the compiler that the loop should be vectorized according to the argument keywords. |