User and Reference Guide for the Intel® C++ Compiler 14.0

opt-streaming-cache-evict, Qopt-streaming-cache-evict

Specifies the cache eviction level to be used by the compiler for streaming loads and stores. This option only applies to Intel® MIC Architecture.

Architecture Restrictions

Only available on Intel® 64 architecture targeting Intel® MIC Architecture

Syntax

Linux OS:

-opt-streaming-cache-evict[=n]

OS X:

None

Windows OS:

/Qopt-streaming-cache-evict[:n]

Arguments

n

Is a value denoting the cache eviction (clevict) level to use for streaming loads and stores. Possible values are:

0

Tells the compiler to use no cache eviction level.

1

Tells the compiler to use the L1 cache eviction level.

2

Tells the compiler to use the L2 cache eviction level.

3

Tells the compiler to use the L1 and L2 cache eviction level. This is the default of you do not specify n.

Default

2

The compiler uses the L2 cache eviction level.

Description

This option specifies the cache eviction (clevict) level to be used by the compiler for streaming loads and stores.

Depending on the level used, the compiler will generate clevict0 and/or clevict1 instructions that evict the cache-line (corresponding to the load or the store) from the first-level and second-level caches. These cache eviction instructions will be generated after performing the corresponding load/store operation.

For more information on how to mark loads/stores as streaming, see the description of the vector nontemporal pragma.

IDE Equivalent

None

Alternate Options

None

Parent topic: Advanced Optimization Options

See Also

opt-threads-per-core, Qopt-threads-per-core compiler option
opt-streaming-stores, Qopt-streaming-stores compiler option
vector nontemporal pragma

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